1. Technical Field
The present invention relates to integrated circuits in general, and in particular to integrated circuits having silicon-on-insulator transistors. Still more particularly, the present invention relates to a radiation hardened silicon-on-insulator transistor having a body contact.
2. Description of the Prior Art
With silicon-on-insulator (SOI) processing technology, field effect transistors are formed in a layer of semiconductor material that overlies an insulating layer such as silicon dioxide or sapphire. SOI technology offers several significant advantages over transistors formed in a bulk silicon wafer. For example, a bulk silicon transistor has its active terminals disposed adjacent the bulk silicon wafer, and as a result, parasitic capacitance is present at the junction between source and drain regions of the bulk silicon transistor and the well or bulk silicon substrate. Other problems with bulk silicon transistors include the possibility of junction breakdown between the source or drain regions and the bulk silicon wafer, together with the formation of undesired parasitic bipolar transistors that give rise to device latch-up problems.
In contrast, SOI transistors have their active regions (i.e., the source, drain, and channel) formed adjacent an underlying insulating layer, and as a result, undesired parasitic elements are significantly reduced- or even eliminated. SOI technology also significantly reduces junction capacitance and junction leakage due to the reduced exposed junction area, which leads to improved circuit performance and higher circuit density.
Despite of the above-mentioned advantages, SOI technology also has its own inherent problems. All of these problems can be attributed primarily to the fact that, in an SOI transistor, a body node underlying a transistor gate is isolated from a bulk silicon substrate by an insulating layer. Thus, the body node is electrically floating. Most often, this floating body node is undesirable since it causes problems in SOI transistor operation. For example, for a partially-depleted SOI transistor, a phenomenon associated with impact ionization can occur. More specifically, when an electron-hole pair is formed by ionization of a lattice atom by an electron, the hole migrates towards the source of the SOI transistor. Since the well is not tied to the source, the excess holes generated are collected in the well, thereby raising the well potential and, thus, modifying the characteristics of the SOI transistor. The resulting change in voltage lowers the effective threshold voltage relative to the drain-to-source voltage, and increases the drain current. This results in the well-known xe2x80x9ckinkxe2x80x9d or sharp irregularity in a current-voltage curve of the partially-depleted SOI transistor. This xe2x80x9ckinkxe2x80x9d effect may seriously degrade the performance of the SOI transistor.
In addition, the floating body node of an SOI transistor may permit parasitic bipolar (e.g., NPN) devices to be undesirably turned on. Further, a parasitic back channel transistor, comprised of the substrate acting as the gate and the insulating layer acting as the gate dielectric, may provide a drain-to-source leakage path along the body node near its interface with the insulating layer.
Typically, the inherent problems associated with the floating body node of an SOI transistor can be countered by connecting the body node to a source terminal. In normal transistor operations, the source terminal is connected to an electrical ground potential. Thus, the holes generated by impact ionization are then attracted to the fixed ground connection through a body contact (or a body tie). Some prior art approaches for connecting the body node to a fixed potential include body-tied-to-source (BTS) structures (also known as well shunts or well contacts), H-type gate structure devices (or H-transistors), T-type gate structure devices, and local well ties. However, each of these approaches has its drawbacks.
For example, BTS structures are typically fabricated at the outer periphery of the active transistor regions. Generally, if a body contact is made outside the source terminal, the body contact takes up valuable area on the substrate, reducing the electrical width of the active transistor regions. Moreover, BTS structures are extremely sensitive to alignments commonly achievable by various processing techniques. Further, BTS structures result in an unidirectional transistor operation (i.e., the source and drain terminals cannot be used interchangeably).
Another problem with BTS structures is xe2x80x9csnapback.xe2x80x9d More specifically, as a result of electron/hole generation at the drain of an n-channel transistor through impact ionization, hole current flows to the substrate contact of a P-well. For bulk silicon transistors, the cross-sectional area to the P-well contact is large and the resistance is small. On the other hand, thin film SOI devices have a much smaller cross-sectional area and a corresponding increase in body contact resistance. Thus, the only conduction path to the body contact is under the channel, which further reduces the cross-sectional area.
Consequently, the same amount of hole current generated in an SOI device passes through a much smaller cross-sectional area relative to a bulk transistor, which causes a much larger voltage rise in the channel region. This voltage rise lowers the barrier at the source and injects more electrons into the channel region. This increase in current causes a larger amount of hole current to be generated, which results in additional barrier lowering. As the cycle continues, the barrier is lowered even more such that more electrons are injected into the channel region; more hole current is generated; and the barrier lowers still more. This uncontrolled state, caused by the hot carrier effect, is known as xe2x80x9csnapback.xe2x80x9d The hot carrier effect is primarily a problem with N-channel devices because of the high electron mobility. Essentially, as impact ionization occurs and more electron-hole pairs are created, the holes continue to raise the well potential. Eventually, the transistor enters the snapback state and latches on. In this internal latch-up state, the transistor cannot be shut off unless the power supply is removed.
H-transistors are generally only effective below a certain device width for a given film thickness and doping profile. Above this device width, the resistance of the well or body node becomes prohibitively high, thereby negating the effectiveness of the resulting transistor. In other words, as the well resistance rises, the corresponding voltage rise across the body node becomes undesirably large. Further, there is a significant substrate area penalty associated with the use of H-transistor body contacts.
T-type devices have similar problems as H-transistors, except that T-type devices require device widths only about one-half of those used with transistors. As such, only one side of the T-type device is effective in suppressing parasitic sidewall characteristics of the underlying transistor. T-type device utilizes local well ties that offer little, if any, advantage to SOI transistor device designs. The disadvantages associated with local well ties include area penalty, difficulty in using a trench isolation structure, relatively high well resistance, and no suppression of parasitic sidewall characteristics.
Consequently, it would be desirable to provide an improved body contact for an SOI transistor.
In accordance with a preferred embodiment of the present invention, a dielectric layer is disposed on a substrate, and a transistor structure is disposed on the dielectric layer. The transistor structure includes a body region, a source region, a drain region, and a gate layer. The body region is formed on a first surface portion of the dielectric layer, the source region is formed on a second surface portion of the dielectric layer contiguous with the first surface portion, the drain region is formed on a third surface portion of the dielectric layer contiguous with the first surface portion, and the gate layer overlies the body region and being operative to induce a channel in that portion of the body region disposed between and adjoining the source region and the drain region. In addition, multiple diffusions are placed across two edges of the source region. These diffusions are ohmically connected to the body region via a body contact, and these diffusions are also connected to the source region by a self-aligned salicide.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.